Embodiments disclosed herein relate generally to electronic devices and, more specifically, to near chip scale package electronic device structures and methods of fabricating the same.
Electronic devices such as semiconductor dies are conventionally enclosed in plastic packages that provide protection from hostile environments and enable electrical interconnection between the semiconductor die and an underlying substrate such as a printed circuit board (PCB) or motherboard. The elements of such a package include a metal leadframe, a semiconductor die, bonding material to attach the semiconductor die to the leadframe, bond wires that electrically connect pads on the semiconductor die to individual leads of the leadframe, and a hard plastic encapsulant material that covers at least some of the components and forms the exterior of the semiconductor package commonly referred to as the package body.
The lead frame is the central supporting structure of such a package, and typically is fabricated by chemically etching or mechanically stamping a metal strip. The lead frame typically includes a side frame defining an entire framework, a chip pad for mounting one or more semiconductor chips, one or more tie bars integrally connecting the side frame to the chip pad, and a plurality of leads extending from the side frame to the corners of the chip pad. A portion of the leadframe is internal to the package body or completely surrounded by the plastic encapsulant. Portions of the leads of the leadframe may extend externally from the package body or may be partially exposed therein for use in electrically connecting the package to another component. In certain semiconductor packages, a portion of the die pad of the leadframe also remains exposed within the package body.
There is a class of semiconductor packages referred to as near chip scale packages (CSP) that include very thin, fine pitch, and small area leadframes that approximate the size of the semiconductor chip. Such packages include the MicroLeadFrame® (MLF) style of packages, LFCSP, VQFN, and QFN—Quad Flat No-Lead packages. These packages typically have package body sizes in the 1 mm to 13 mm range and package heights in the 0.3 mm to 2.1 mm range. In order to enhance unit productivity, near chip scale packages such as MLF style packages are assembled in a matrix of multiple leadframes and encapsulated in an overmolding process. The individual MLF structures are then separated into individual packages typically using a sawing process, which cuts through the mold compound and the leadframes.
Several problems exist with current leadframe structures for near chip scale packages because of their reduced size and the way they are manufactured. Such problems include deformation or shifting of the leads during manufacturing where they become vertically tilted or curved or horizontally bent or curved. These defects can result in electrical shorts and device failures. Also, as each lead is pressed and cut during the sawing process, metal burrs result that can create a metal bridge between adjoining leads thus resulting in electrical shorts and device failure.
Accordingly, it is desirable to have a structure and method that provides a reinforced or strengthened leadframe for electronic packages, such as near chip scale packaged electronic devices. It is also desirable to have a structure a method that is cost effective, easy to integrate into assembly process flows, and reliable.
For simplicity and clarity of the illustration, elements in the figures are not necessarily drawn to scale, and the same reference numbers in different figures can denote the same elements. The use of the word about, approximately or substantially means that a value of an element has a parameter that is expected to be close to a stated value or position. However, as is well known in the art there are always minor variances that prevent the values or positions from being exactly as stated. Additionally, descriptions and details of well-known steps and elements may be omitted for simplicity of the description.